\doxysection{stm32h7xx\+\_\+ll\+\_\+dmamux.\+h}
\hypertarget{stm32h7xx__ll__dmamux_8h_source}{}\label{stm32h7xx__ll__dmamux_8h_source}\index{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_ll\_dmamux.h@{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_ll\_dmamux.h}}
\mbox{\hyperlink{stm32h7xx__ll__dmamux_8h}{Go to the documentation of this file.}}
\begin{DoxyCode}{0}
\DoxyCodeLine{00001\ }
\DoxyCodeLine{00018\ }
\DoxyCodeLine{00019\ \textcolor{comment}{/*\ Define\ to\ prevent\ recursive\ inclusion\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00020\ \textcolor{preprocessor}{\#ifndef\ STM32H7xx\_LL\_DMAMUX\_H}}
\DoxyCodeLine{00021\ \textcolor{preprocessor}{\#define\ STM32H7xx\_LL\_DMAMUX\_H}}
\DoxyCodeLine{00022\ }
\DoxyCodeLine{00023\ \textcolor{preprocessor}{\#ifdef\ \_\_cplusplus}}
\DoxyCodeLine{00024\ \textcolor{keyword}{extern}\ \textcolor{stringliteral}{"{}C"{}}\ \{}
\DoxyCodeLine{00025\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{00026\ }
\DoxyCodeLine{00027\ \textcolor{comment}{/*\ Includes\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00028\ \textcolor{preprocessor}{\#include\ "{}\mbox{\hyperlink{stm32h7xx_8h}{stm32h7xx.h}}"{}}}
\DoxyCodeLine{00029\ }
\DoxyCodeLine{00033\ }
\DoxyCodeLine{00034\ \textcolor{preprocessor}{\#if\ defined\ (DMAMUX1)\ ||\ defined\ (DMAMUX2)}}
\DoxyCodeLine{00035\ }
\DoxyCodeLine{00039\ }
\DoxyCodeLine{00040\ \textcolor{comment}{/*\ Private\ types\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00041\ \textcolor{comment}{/*\ Private\ variables\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00042\ \textcolor{comment}{/*\ Private\ constants\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00046\ \textcolor{comment}{/*\ Define\ used\ to\ get\ DMAMUX\ CCR\ register\ size\ */}}
\DoxyCodeLine{00047\ \textcolor{preprocessor}{\#define\ DMAMUX\_CCR\_SIZE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000004U}}
\DoxyCodeLine{00048\ }
\DoxyCodeLine{00049\ \textcolor{comment}{/*\ Define\ used\ to\ get\ DMAMUX\ RGCR\ register\ size\ */}}
\DoxyCodeLine{00050\ \textcolor{preprocessor}{\#define\ DMAMUX\_RGCR\_SIZE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000004U}}
\DoxyCodeLine{00051\ }
\DoxyCodeLine{00052\ \textcolor{comment}{/*\ Define\ used\ to\ get\ DMAMUX\ RequestGenerator\ offset\ */}}
\DoxyCodeLine{00053\ \textcolor{preprocessor}{\#define\ DMAMUX\_REQ\_GEN\_OFFSET\ \ \ \ \ \ \ \ \ \ \ \ \ (DMAMUX1\_RequestGenerator0\_BASE\ -\/\ DMAMUX1\_BASE)}}
\DoxyCodeLine{00054\ \textcolor{comment}{/*\ Define\ used\ to\ get\ DMAMUX\ Channel\ Status\ offset\ */}}
\DoxyCodeLine{00055\ \textcolor{preprocessor}{\#define\ DMAMUX\_CH\_STATUS\_OFFSET\ \ \ \ \ \ \ \ \ \ \ (DMAMUX1\_ChannelStatus\_BASE\ -\/\ DMAMUX1\_BASE)}}
\DoxyCodeLine{00056\ \textcolor{comment}{/*\ Define\ used\ to\ get\ DMAMUX\ RequestGenerator\ status\ offset\ */}}
\DoxyCodeLine{00057\ \textcolor{preprocessor}{\#define\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET\ \ \ \ \ \ (DMAMUX1\_RequestGenStatus\_BASE\ -\/\ DMAMUX1\_BASE)}}
\DoxyCodeLine{00058\ }
\DoxyCodeLine{00062\ }
\DoxyCodeLine{00063\ \textcolor{comment}{/*\ Private\ macros\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00064\ \textcolor{comment}{/*\ Exported\ types\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00065\ \textcolor{comment}{/*\ Exported\ constants\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00073\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF0\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00074\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF1\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00075\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF2\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00076\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF3\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00077\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF4\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00078\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF5\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF5\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00079\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF6\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF6\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00080\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF7\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF7\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00081\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF8\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF8\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00082\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF9\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF9\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00083\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF10\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF10\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00084\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF11\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF11\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00085\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF12\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF12\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00086\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF13\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF13\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00087\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF14\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF14\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00088\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CFR\_CSOF15\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CFR\_CSOF15\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00089\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGCFR\_RGCOF0\ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGCFR\_COF0\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00090\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGCFR\_RGCOF1\ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGCFR\_COF1\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00091\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGCFR\_RGCOF2\ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGCFR\_COF2\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00092\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGCFR\_RGCOF3\ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGCFR\_COF3\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00093\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGCFR\_RGCOF4\ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGCFR\_COF4\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00094\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGCFR\_RGCOF5\ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGCFR\_COF5\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00095\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGCFR\_RGCOF6\ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGCFR\_COF6\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00096\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGCFR\_RGCOF7\ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGCFR\_COF7\ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00100\ }
\DoxyCodeLine{00105\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF0\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00106\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF1\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00107\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF2\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00108\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF3\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF3\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00109\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF4\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00110\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF5\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF5\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00111\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF6\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF6\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00112\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF7\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF7\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00113\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF8\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF8\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00114\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF9\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF9\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00115\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF10\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF10\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00116\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF11\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF11\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00117\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF12\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF12\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00118\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF13\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF13\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00119\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF14\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF14\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00120\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CSR\_SOF15\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CSR\_SOF15\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00121\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGSR\_RGOF0\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGSR\_OF0\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00122\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGSR\_RGOF1\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGSR\_OF1\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00123\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGSR\_RGOF2\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGSR\_OF2\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00124\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGSR\_RGOF3\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGSR\_OF3\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00125\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGSR\_RGOF4\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGSR\_OF4\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00126\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGSR\_RGOF5\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGSR\_OF5\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00127\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGSR\_RGOF6\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGSR\_OF6\ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00128\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGSR\_RGOF7\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGSR\_OF7\ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00132\ }
\DoxyCodeLine{00137\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CCR\_SOIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_CxCR\_SOIE\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00138\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_RGCR\_RGOIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGxCR\_OIE\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00142\ }
\DoxyCodeLine{00147\ \textcolor{comment}{/*\ DMAMUX1\ requests\ */}}
\DoxyCodeLine{00148\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_MEM2MEM\ \ \ \ \ \ \ \ \ \ 0U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00149\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GENERATOR0\ \ \ \ \ \ \ 1U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00150\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GENERATOR1\ \ \ \ \ \ \ 2U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00151\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GENERATOR2\ \ \ \ \ \ \ 3U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00152\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GENERATOR3\ \ \ \ \ \ \ 4U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00153\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GENERATOR4\ \ \ \ \ \ \ 5U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00154\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GENERATOR5\ \ \ \ \ \ \ 6U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00155\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GENERATOR6\ \ \ \ \ \ \ 7U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00156\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GENERATOR7\ \ \ \ \ \ \ 8U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00157\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_ADC1\ \ \ \ \ \ \ \ \ \ \ \ \ 9U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00158\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_ADC2\ \ \ \ \ \ \ \ \ \ \ \ \ 10U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00159\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM1\_CH1\ \ \ \ \ \ \ \ \ 11U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00160\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM1\_CH2\ \ \ \ \ \ \ \ \ 12U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00161\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM1\_CH3\ \ \ \ \ \ \ \ \ 13U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00162\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM1\_CH4\ \ \ \ \ \ \ \ \ 14U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00163\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM1\_UP\ \ \ \ \ \ \ \ \ \ 15U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00164\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM1\_TRIG\ \ \ \ \ \ \ \ 16U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00165\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM1\_COM\ \ \ \ \ \ \ \ \ 17U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00166\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM2\_CH1\ \ \ \ \ \ \ \ \ 18U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00167\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM2\_CH2\ \ \ \ \ \ \ \ \ 19U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00168\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM2\_CH3\ \ \ \ \ \ \ \ \ 20U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00169\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM2\_CH4\ \ \ \ \ \ \ \ \ 21U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00170\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM2\_UP\ \ \ \ \ \ \ \ \ \ 22U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00171\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM3\_CH1\ \ \ \ \ \ \ \ \ 23U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00172\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM3\_CH2\ \ \ \ \ \ \ \ \ 24U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00173\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM3\_CH3\ \ \ \ \ \ \ \ \ 25U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00174\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM3\_CH4\ \ \ \ \ \ \ \ \ 26U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00175\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM3\_UP\ \ \ \ \ \ \ \ \ \ 27U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00176\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM3\_TRIG\ \ \ \ \ \ \ \ 28U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00177\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM4\_CH1\ \ \ \ \ \ \ \ \ 29U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00178\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM4\_CH2\ \ \ \ \ \ \ \ \ 30U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00179\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM4\_CH3\ \ \ \ \ \ \ \ \ 31U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00180\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM4\_UP\ \ \ \ \ \ \ \ \ \ 32U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00181\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_I2C1\_RX\ \ \ \ \ \ \ \ \ \ 33U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00182\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_I2C1\_TX\ \ \ \ \ \ \ \ \ \ 34U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00183\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_I2C2\_RX\ \ \ \ \ \ \ \ \ \ 35U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00184\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_I2C2\_TX\ \ \ \ \ \ \ \ \ \ 36U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00185\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPI1\_RX\ \ \ \ \ \ \ \ \ \ 37U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00186\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPI1\_TX\ \ \ \ \ \ \ \ \ \ 38U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00187\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPI2\_RX\ \ \ \ \ \ \ \ \ \ 39U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00188\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPI2\_TX\ \ \ \ \ \ \ \ \ \ 40U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00189\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_USART1\_RX\ \ \ \ \ \ \ \ 41U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00190\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_USART1\_TX\ \ \ \ \ \ \ \ 42U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00191\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_USART2\_RX\ \ \ \ \ \ \ \ 43U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00192\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_USART2\_TX\ \ \ \ \ \ \ \ 44U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00193\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_USART3\_RX\ \ \ \ \ \ \ \ 45U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00194\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_USART3\_TX\ \ \ \ \ \ \ \ 46U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00195\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM8\_CH1\ \ \ \ \ \ \ \ \ 47U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00196\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM8\_CH2\ \ \ \ \ \ \ \ \ 48U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00197\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM8\_CH3\ \ \ \ \ \ \ \ \ 49U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00198\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM8\_CH4\ \ \ \ \ \ \ \ \ 50U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00199\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM8\_UP\ \ \ \ \ \ \ \ \ \ 51U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00200\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM8\_TRIG\ \ \ \ \ \ \ \ 52U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00201\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM8\_COM\ \ \ \ \ \ \ \ \ 53U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00202\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM5\_CH1\ \ \ \ \ \ \ \ \ 55U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00203\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM5\_CH2\ \ \ \ \ \ \ \ \ 56U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00204\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM5\_CH3\ \ \ \ \ \ \ \ \ 57U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00205\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM5\_CH4\ \ \ \ \ \ \ \ \ 58U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00206\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM5\_UP\ \ \ \ \ \ \ \ \ \ 59U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00207\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM5\_TRIG\ \ \ \ \ \ \ \ 60U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00208\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPI3\_RX\ \ \ \ \ \ \ \ \ \ 61U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00209\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPI3\_TX\ \ \ \ \ \ \ \ \ \ 62U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00210\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_UART4\_RX\ \ \ \ \ \ \ \ \ 63U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00211\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_UART4\_TX\ \ \ \ \ \ \ \ \ 64U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00212\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_UART5\_RX\ \ \ \ \ \ \ \ \ 65U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00213\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_UART5\_TX\ \ \ \ \ \ \ \ \ 66U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00214\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_DAC1\_CH1\ \ \ \ \ \ \ \ \ 67U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00215\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_DAC1\_CH2\ \ \ \ \ \ \ \ \ 68U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00216\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM6\_UP\ \ \ \ \ \ \ \ \ \ 69U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00217\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM7\_UP\ \ \ \ \ \ \ \ \ \ 70U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00218\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_USART6\_RX\ \ \ \ \ \ \ \ 71U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00219\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_USART6\_TX\ \ \ \ \ \ \ \ 72U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00220\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_I2C3\_RX\ \ \ \ \ \ \ \ \ \ 73U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00221\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_I2C3\_TX\ \ \ \ \ \ \ \ \ \ 74U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00222\ \textcolor{preprocessor}{\#if\ defined\ (PSSI)}}
\DoxyCodeLine{00223\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_DCMI\_PSSI\ \ \ \ \ \ \ \ 75U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00224\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_DCMI\ \ \ \ \ \ \ \ \ \ \ \ \ LL\_DMAMUX1\_REQ\_DCMI\_PSSI\ }\textcolor{comment}{/*\ Legacy\ define\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00225\ \textcolor{preprocessor}{\#else}}
\DoxyCodeLine{00226\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_DCMI\ \ \ \ \ \ \ \ \ \ \ \ \ 75U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00227\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ PSSI\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00228\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_CRYP\_IN\ \ \ \ \ \ \ \ \ \ 76U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00229\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_CRYP\_OUT\ \ \ \ \ \ \ \ \ 77U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00230\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_HASH\_IN\ \ \ \ \ \ \ \ \ \ 78U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00231\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_UART7\_RX\ \ \ \ \ \ \ \ \ 79U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00232\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_UART7\_TX\ \ \ \ \ \ \ \ \ 80U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00233\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_UART8\_RX\ \ \ \ \ \ \ \ \ 81U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00234\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_UART8\_TX\ \ \ \ \ \ \ \ \ 82U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00235\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPI4\_RX\ \ \ \ \ \ \ \ \ \ 83U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00236\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPI4\_TX\ \ \ \ \ \ \ \ \ \ 84U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00237\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPI5\_RX\ \ \ \ \ \ \ \ \ \ 85U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00238\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPI5\_TX\ \ \ \ \ \ \ \ \ \ 86U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00239\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SAI1\_A\ \ \ \ \ \ \ \ \ \ \ 87U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00240\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SAI1\_B\ \ \ \ \ \ \ \ \ \ \ 88U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00241\ \textcolor{preprocessor}{\#if\ defined(SAI2)}}
\DoxyCodeLine{00242\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SAI2\_A\ \ \ \ \ \ \ \ \ \ \ 89U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00243\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SAI2\_B\ \ \ \ \ \ \ \ \ \ \ 90U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00244\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ SAI2\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00245\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SWPMI\_RX\ \ \ \ \ \ \ \ \ 91U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00246\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SWPMI\_TX\ \ \ \ \ \ \ \ \ 92U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00247\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPDIF\_RX\_DT\ \ \ \ \ \ 93U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00248\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SPDIF\_RX\_CS\ \ \ \ \ \ 94U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00249\ \textcolor{preprocessor}{\#if\ defined\ (HRTIM1)}}
\DoxyCodeLine{00250\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_HRTIM\_MASTER\ \ \ \ \ 95U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00251\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_HRTIM\_TIMER\_A\ \ \ \ 96U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00252\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_HRTIM\_TIMER\_B\ \ \ \ 97U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00253\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_HRTIM\_TIMER\_C\ \ \ \ 98U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00254\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_HRTIM\_TIMER\_D\ \ \ \ 99U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00255\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_HRTIM\_TIMER\_E\ \ \ 100U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00256\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ HRTIM1\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00257\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_DFSDM1\_FLT0\ \ \ \ \ 101U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00258\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_DFSDM1\_FLT1\ \ \ \ \ 102U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00259\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_DFSDM1\_FLT2\ \ \ \ \ 103U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00260\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_DFSDM1\_FLT3\ \ \ \ \ 104U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00261\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM15\_CH1\ \ \ \ \ \ \ 105U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00262\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM15\_UP\ \ \ \ \ \ \ \ 106U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00263\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM15\_TRIG\ \ \ \ \ \ 107U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00264\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM15\_COM\ \ \ \ \ \ \ 108U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00265\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM16\_CH1\ \ \ \ \ \ \ 109U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00266\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM16\_UP\ \ \ \ \ \ \ \ 110U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00267\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM17\_CH1\ \ \ \ \ \ \ 111U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00268\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM17\_UP\ \ \ \ \ \ \ \ 112U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00269\ \textcolor{preprocessor}{\#if\ defined\ (SAI3)}}
\DoxyCodeLine{00270\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SAI3\_A\ \ \ \ \ \ \ \ \ \ 113U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00271\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_SAI3\_B\ \ \ \ \ \ \ \ \ \ 114U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00272\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ SAI3\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00273\ \textcolor{preprocessor}{\#if\ defined\ (ADC3)}}
\DoxyCodeLine{00274\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_ADC3\ \ \ \ \ \ \ \ \ \ \ \ 115U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00275\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ ADC3\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00276\ \textcolor{preprocessor}{\#if\ defined\ (UART9)}}
\DoxyCodeLine{00277\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_UART9\_RX\ \ \ \ \ \ \ \ 116U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00278\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_UART9\_TX\ \ \ \ \ \ \ \ 117U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00279\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ UART9\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00280\ \textcolor{preprocessor}{\#if\ defined\ (USART10)}}
\DoxyCodeLine{00281\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_USART10\_RX\ \ \ \ \ \ 118U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00282\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_USART10\_TX\ \ \ \ \ \ 119U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00283\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ USART10\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00284\ \textcolor{preprocessor}{\#if\ defined(FMAC)}}
\DoxyCodeLine{00285\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_FMAC\_READ\ \ \ \ \ \ \ 120U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00286\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_FMAC\_WRITE\ \ \ \ \ \ 121U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00287\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ FMAC\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00288\ \textcolor{preprocessor}{\#if\ defined(CORDIC)}}
\DoxyCodeLine{00289\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_CORDIC\_READ\ \ \ \ \ 122U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00290\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_CORDIC\_WRITE\ \ \ \ 123U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00291\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ CORDIC\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00292\ \textcolor{preprocessor}{\#if\ defined(I2C5)}}
\DoxyCodeLine{00293\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_I2C5\_RX\ \ \ \ \ \ \ \ \ 124U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00294\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_I2C5\_TX\ \ \ \ \ \ \ \ \ 125U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00295\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ I2C5\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00296\ \textcolor{preprocessor}{\#if\ defined(TIM23)}}
\DoxyCodeLine{00297\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM23\_CH1\ \ \ \ \ \ \ 126U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00298\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM23\_CH2\ \ \ \ \ \ \ 127U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00299\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM23\_CH3\ \ \ \ \ \ \ 128U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00300\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM23\_CH4\ \ \ \ \ \ \ 129U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00301\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM23\_UP\ \ \ \ \ \ \ \ 130U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00302\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM23\_TRIG\ \ \ \ \ \ 131U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00303\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ TIM23\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00304\ \textcolor{preprocessor}{\#if\ defined(TIM24)}}
\DoxyCodeLine{00305\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM24\_CH1\ \ \ \ \ \ \ 132U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00306\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM24\_CH2\ \ \ \ \ \ \ 133U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00307\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM24\_CH3\ \ \ \ \ \ \ 134U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00308\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM24\_CH4\ \ \ \ \ \ \ 135U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00309\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM24\_UP\ \ \ \ \ \ \ \ 136U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00310\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_TIM24\_TRIG\ \ \ \ \ \ 137U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00311\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ TIM24\ */}\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00315\ }
\DoxyCodeLine{00320\ \textcolor{comment}{/*\ DMAMUX2\ requests\ */}}
\DoxyCodeLine{00321\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_MEM2MEM\ \ \ \ \ \ \ \ \ \ 0U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00322\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GENERATOR0\ \ \ \ \ \ \ 1U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00323\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GENERATOR1\ \ \ \ \ \ \ 2U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00324\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GENERATOR2\ \ \ \ \ \ \ 3U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00325\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GENERATOR3\ \ \ \ \ \ \ 4U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00326\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GENERATOR4\ \ \ \ \ \ \ 5U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00327\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GENERATOR5\ \ \ \ \ \ \ 6U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00328\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GENERATOR6\ \ \ \ \ \ \ 7U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00329\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GENERATOR7\ \ \ \ \ \ \ 8U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00330\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_LPUART1\_RX\ \ \ \ \ \ \ 9U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00331\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_LPUART1\_TX\ \ \ \ \ \ 10U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00332\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_SPI6\_RX\ \ \ \ \ \ \ \ \ 11U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00333\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_SPI6\_TX\ \ \ \ \ \ \ \ \ 12U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00334\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_I2C4\_RX\ \ \ \ \ \ \ \ \ 13U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00335\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_I2C4\_TX\ \ \ \ \ \ \ \ \ 14U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00336\ \textcolor{preprocessor}{\#if\ defined\ (SAI4)}}
\DoxyCodeLine{00337\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_SAI4\_A\ \ \ \ \ \ \ \ \ \ 15U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00338\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_SAI4\_B\ \ \ \ \ \ \ \ \ \ 16U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00339\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ SAI4\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00340\ \textcolor{preprocessor}{\#if\ defined\ (ADC3)}}
\DoxyCodeLine{00341\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_ADC3\ \ \ \ \ \ \ \ \ \ \ \ 17U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00342\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ ADC3\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00343\ \textcolor{preprocessor}{\#if\ defined\ (DAC2)}}
\DoxyCodeLine{00344\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_DAC2\_CH1\ \ \ \ \ \ \ \ 17U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00345\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DAC2\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00346\ \textcolor{preprocessor}{\#if\ defined\ (DFSDM2\_Channel0)}}
\DoxyCodeLine{00347\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_DFSDM2\_FLT0\ \ \ \ \ 18U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00348\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DFSDM2\_Channel0\ */}\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00352\ }
\DoxyCodeLine{00353\ }
\DoxyCodeLine{00357\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_0\ \ \ \ \ 0x00000000U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00358\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_1\ \ \ \ \ 0x00000001U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00359\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_2\ \ \ \ \ 0x00000002U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00360\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_3\ \ \ \ \ 0x00000003U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00361\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_4\ \ \ \ \ 0x00000004U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00362\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_5\ \ \ \ \ 0x00000005U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00363\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_6\ \ \ \ \ 0x00000006U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00364\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_7\ \ \ \ \ 0x00000007U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00365\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_8\ \ \ \ \ 0x00000008U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00366\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_9\ \ \ \ \ 0x00000009U\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00367\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_10\ \ \ \ 0x0000000AU\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00368\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_11\ \ \ \ 0x0000000BU\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00369\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_12\ \ \ \ 0x0000000CU\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00370\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_13\ \ \ \ 0x0000000DU\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00371\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_14\ \ \ \ 0x0000000EU\ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00372\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_CHANNEL\_15\ \ \ \ 0x0000000FU\ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00376\ }
\DoxyCodeLine{00380\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_SYNC\_NO\_EVENT\ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00381\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_SYNC\_POL\_RISING\ \ \ \ \ \ \ \ \ \ DMAMUX\_CxCR\_SPOL\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00382\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_SYNC\_POL\_FALLING\ \ \ \ \ \ \ \ \ DMAMUX\_CxCR\_SPOL\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00383\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_SYNC\_POL\_RISING\_FALLING\ \ (DMAMUX\_CxCR\_SPOL\_0\ |\ DMAMUX\_CxCR\_SPOL\_1)\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00387\ }
\DoxyCodeLine{00391\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_SYNC\_DMAMUX1\_CH0\_EVT\ \ \ 0x00000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00392\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_SYNC\_DMAMUX1\_CH1\_EVT\ \ \ 0x01000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00393\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_SYNC\_DMAMUX1\_CH2\_EVT\ \ \ 0x02000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00394\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_SYNC\_LPTIM1\_OUT\ \ \ \ \ \ \ \ 0x03000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00395\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_SYNC\_LPTIM2\_OUT\ \ \ \ \ \ \ \ 0x04000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00396\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_SYNC\_LPTIM3\_OUT\ \ \ \ \ \ \ \ 0x05000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00397\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_SYNC\_EXTI0\ \ \ \ \ \ \ \ \ \ \ \ \ 0x06000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00398\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_SYNC\_TIM12\_TRGO\ \ \ \ \ \ \ \ 0x07000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00399\ }
\DoxyCodeLine{00400\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_DMAMUX2\_CH0\_EVT\ \ \ 0x00000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00401\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_DMAMUX2\_CH1\_EVT\ \ \ 0x01000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00402\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_DMAMUX2\_CH2\_EVT\ \ \ 0x02000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00403\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_DMAMUX2\_CH3\_EVT\ \ \ 0x03000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00404\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_DMAMUX2\_CH4\_EVT\ \ \ 0x04000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00405\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_DMAMUX2\_CH5\_EVT\ \ \ 0x05000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00406\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_LPUART1\_RX\_WKUP\ \ \ 0x06000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00407\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_LPUART1\_TX\_WKUP\ \ \ 0x07000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00408\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_LPTIM2\_OUT\ \ \ \ \ \ \ \ 0x08000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00409\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_LPTIM3\_OUT\ \ \ \ \ \ \ \ 0x09000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00410\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_I2C4\_WKUP\ \ \ \ \ \ \ \ \ 0x0A000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00411\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_SPI6\_WKUP\ \ \ \ \ \ \ \ \ 0x0B000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00412\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_COMP1\_OUT\ \ \ \ \ \ \ \ \ 0x0C000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00413\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_RTC\_WKUP\ \ \ \ \ \ \ \ \ \ 0x0D000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00414\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_EXTI0\ \ \ \ \ \ \ \ \ \ \ \ \ 0x0E000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00415\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_SYNC\_EXTI2\ \ \ \ \ \ \ \ \ \ \ \ \ 0x0F000000U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00416\ }
\DoxyCodeLine{00420\ }
\DoxyCodeLine{00424\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_0\ \ \ \ \ \ \ \ \ \ \ 0x00000000U}}
\DoxyCodeLine{00425\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_1\ \ \ \ \ \ \ \ \ \ \ 0x00000001U}}
\DoxyCodeLine{00426\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_2\ \ \ \ \ \ \ \ \ \ \ 0x00000002U}}
\DoxyCodeLine{00427\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_3\ \ \ \ \ \ \ \ \ \ \ 0x00000003U}}
\DoxyCodeLine{00428\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_4\ \ \ \ \ \ \ \ \ \ \ 0x00000004U}}
\DoxyCodeLine{00429\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_5\ \ \ \ \ \ \ \ \ \ \ 0x00000005U}}
\DoxyCodeLine{00430\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_6\ \ \ \ \ \ \ \ \ \ \ 0x00000006U}}
\DoxyCodeLine{00431\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_7\ \ \ \ \ \ \ \ \ \ \ 0x00000007U}\textcolor{preprocessor}{}}
\DoxyCodeLine{00435\ }
\DoxyCodeLine{00439\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_NO\_EVENT\ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00440\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_POL\_RISING\ \ \ \ \ \ \ \ \ \ \ DMAMUX\_RGxCR\_GPOL\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00441\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_POL\_FALLING\ \ \ \ \ \ \ \ \ \ DMAMUX\_RGxCR\_GPOL\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00442\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_REQ\_GEN\_POL\_RISING\_FALLING\ \ \ (DMAMUX\_RGxCR\_GPOL\_0\ |\ DMAMUX\_RGxCR\_GPOL\_1)\ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00446\ }
\DoxyCodeLine{00450\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GEN\_DMAMUX1\_CH0\_EVT\ \ \ 0U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00451\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GEN\_DMAMUX1\_CH1\_EVT\ \ \ 1U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00452\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GEN\_DMAMUX1\_CH2\_EVT\ \ \ 2U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00453\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GEN\_LPTIM1\_OUT\ \ \ \ \ \ \ \ 3U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00454\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GEN\_LPTIM2\_OUT\ \ \ \ \ \ \ \ 4U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00455\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GEN\_LPTIM3\_OUT\ \ \ \ \ \ \ \ 5U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00456\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GEN\_EXTI0\ \ \ \ \ \ \ \ \ \ \ \ \ 6U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00457\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX1\_REQ\_GEN\_TIM12\_TRGO\ \ \ \ \ \ \ \ 7U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00458\ }
\DoxyCodeLine{00459\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_DMAMUX2\_CH0\_EVT\ \ \ 0U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00460\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_DMAMUX2\_CH1\_EVT\ \ \ 1U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00461\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_DMAMUX2\_CH2\_EVT\ \ \ 2U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00462\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_DMAMUX2\_CH3\_EVT\ \ \ 3U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00463\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_DMAMUX2\_CH4\_EVT\ \ \ 4U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00464\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_DMAMUX2\_CH5\_EVT\ \ \ 5U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00465\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_DMAMUX2\_CH6\_EVT\ \ \ 6U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00466\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_LPUART1\_RX\_WKUP\ \ \ 7U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00467\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_LPUART1\_TX\_WKUP\ \ \ 8U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00468\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_LPTIM2\_WKUP\ \ \ \ \ \ \ 9U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00469\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_LPTIM2\_OUT\ \ \ \ \ \ \ 10U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00470\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_LPTIM3\_WKUP\ \ \ \ \ \ 11U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00471\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_LPTIM3\_OUT\ \ \ \ \ \ \ 12U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00472\ \textcolor{preprocessor}{\#if\ defined\ (LPTIM4)}}
\DoxyCodeLine{00473\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_LPTIM4\_WKUP\ \ \ \ \ \ 13U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00474\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ LPTIM4\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00475\ \textcolor{preprocessor}{\#if\ defined\ (LPTIM5)}}
\DoxyCodeLine{00476\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_LPTIM5\_WKUP\ \ \ \ \ \ 14U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00477\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ LPTIM5\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00478\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_I2C4\_WKUP\ \ \ \ \ \ \ \ 15U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00479\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_SPI6\_WKUP\ \ \ \ \ \ \ \ 16U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00480\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_COMP1\_OUT\ \ \ \ \ \ \ \ 17U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00481\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_COMP2\_OUT\ \ \ \ \ \ \ \ 18U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00482\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_RTC\_WKUP\ \ \ \ \ \ \ \ \ 19U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00483\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_EXTI0\ \ \ \ \ \ \ \ \ \ \ \ 20U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00484\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_EXTI2\ \ \ \ \ \ \ \ \ \ \ \ 21U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00485\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_I2C4\_IT\_EVT\ \ \ \ \ \ 22U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00486\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_SPI6\_IT\ \ \ \ \ \ \ \ \ \ 23U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00487\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_LPUART1\_TX\_IT\ \ \ \ 24U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00488\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_LPUART1\_RX\_IT\ \ \ \ 25U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00489\ \textcolor{preprocessor}{\#if\ defined\ (ADC3)}}
\DoxyCodeLine{00490\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_ADC3\_IT\ \ \ \ \ \ \ \ \ \ 26U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00491\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_ADC3\_AWD1\_OUT\ \ \ \ 27U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00492\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ ADC3\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{00493\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_BDMA\_CH0\_IT\ \ \ \ \ \ 28U\ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00494\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX2\_REQ\_GEN\_BDMA\_CH1\_IT\ \ \ \ \ \ 29U\ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00498\ }
\DoxyCodeLine{00502\ }
\DoxyCodeLine{00503\ \textcolor{comment}{/*\ Exported\ macro\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00507\ }
\DoxyCodeLine{00518\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_WriteReg(\_\_INSTANCE\_\_,\ \_\_REG\_\_,\ \_\_VALUE\_\_)\ WRITE\_REG(\_\_INSTANCE\_\_-\/>\_\_REG\_\_,\ (\_\_VALUE\_\_))}}
\DoxyCodeLine{00519\ }
\DoxyCodeLine{00526\ \textcolor{preprocessor}{\#define\ LL\_DMAMUX\_ReadReg(\_\_INSTANCE\_\_,\ \_\_REG\_\_)\ READ\_REG(\_\_INSTANCE\_\_-\/>\_\_REG\_\_)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00530\ }
\DoxyCodeLine{00534\ }
\DoxyCodeLine{00535\ \textcolor{comment}{/*\ Exported\ functions\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00539\ }
\DoxyCodeLine{00729\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_SetRequestID(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel,\ uint32\_t\ Request)}
\DoxyCodeLine{00730\ \{}
\DoxyCodeLine{00731\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{00732\ }
\DoxyCodeLine{00733\ \ \ MODIFY\_REG(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga429e04913f0ea2ec973e5e82c0264766}{DMAMUX\_CxCR\_DMAREQ\_ID}},\ Request);}
\DoxyCodeLine{00734\ \}}
\DoxyCodeLine{00735\ }
\DoxyCodeLine{00922\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_GetRequestID(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{00923\ \{}
\DoxyCodeLine{00924\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{00925\ }
\DoxyCodeLine{00926\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga429e04913f0ea2ec973e5e82c0264766}{DMAMUX\_CxCR\_DMAREQ\_ID}}));}
\DoxyCodeLine{00927\ \}}
\DoxyCodeLine{00928\ }
\DoxyCodeLine{00953\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_SetSyncRequestNb(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel,\ uint32\_t\ RequestNb)}
\DoxyCodeLine{00954\ \{}
\DoxyCodeLine{00955\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{00956\ }
\DoxyCodeLine{00957\ \ \ MODIFY\_REG(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafb24fe594a98ab3c48ab93f1ab8a26ab}{DMAMUX\_CxCR\_NBREQ}},\ (RequestNb\ -\/\ 1U)\ <<\ DMAMUX\_CxCR\_NBREQ\_Pos);}
\DoxyCodeLine{00958\ \}}
\DoxyCodeLine{00959\ }
\DoxyCodeLine{00983\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_GetSyncRequestNb(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{00984\ \{}
\DoxyCodeLine{00985\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{00986\ }
\DoxyCodeLine{00987\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafb24fe594a98ab3c48ab93f1ab8a26ab}{DMAMUX\_CxCR\_NBREQ}})\ >>\ DMAMUX\_CxCR\_NBREQ\_Pos)\ +\ 1U);}
\DoxyCodeLine{00988\ \}}
\DoxyCodeLine{00989\ }
\DoxyCodeLine{01018\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_SetSyncPolarity(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel,\ uint32\_t\ Polarity)}
\DoxyCodeLine{01019\ \{}
\DoxyCodeLine{01020\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01021\ }
\DoxyCodeLine{01022\ \ \ MODIFY\_REG(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff4d57f6e7b5585e040d495f45b0f9eb}{DMAMUX\_CxCR\_SPOL}},\ Polarity);}
\DoxyCodeLine{01023\ \}}
\DoxyCodeLine{01024\ }
\DoxyCodeLine{01052\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_GetSyncPolarity(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{01053\ \{}
\DoxyCodeLine{01054\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01055\ }
\DoxyCodeLine{01056\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff4d57f6e7b5585e040d495f45b0f9eb}{DMAMUX\_CxCR\_SPOL}}));}
\DoxyCodeLine{01057\ \}}
\DoxyCodeLine{01058\ }
\DoxyCodeLine{01082\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_EnableEventGeneration(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{01083\ \{}
\DoxyCodeLine{01084\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01085\ }
\DoxyCodeLine{01086\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacc99ef1ca19c4c307bf9b432150a59fc}{DMAMUX\_CxCR\_EGE}});}
\DoxyCodeLine{01087\ \}}
\DoxyCodeLine{01088\ }
\DoxyCodeLine{01112\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_DisableEventGeneration(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{01113\ \{}
\DoxyCodeLine{01114\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01115\ }
\DoxyCodeLine{01116\ \ \ CLEAR\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacc99ef1ca19c4c307bf9b432150a59fc}{DMAMUX\_CxCR\_EGE}});}
\DoxyCodeLine{01117\ \}}
\DoxyCodeLine{01118\ }
\DoxyCodeLine{01142\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsEnabledEventGeneration(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{01143\ \{}
\DoxyCodeLine{01144\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01145\ }
\DoxyCodeLine{01146\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacc99ef1ca19c4c307bf9b432150a59fc}{DMAMUX\_CxCR\_EGE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gacc99ef1ca19c4c307bf9b432150a59fc}{DMAMUX\_CxCR\_EGE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01147\ \}}
\DoxyCodeLine{01148\ }
\DoxyCodeLine{01172\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_EnableSync(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{01173\ \{}
\DoxyCodeLine{01174\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01175\ }
\DoxyCodeLine{01176\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaeedb99c6edfa679f95441003a4fa184d}{DMAMUX\_CxCR\_SE}});}
\DoxyCodeLine{01177\ \}}
\DoxyCodeLine{01178\ }
\DoxyCodeLine{01202\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_DisableSync(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{01203\ \{}
\DoxyCodeLine{01204\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01205\ }
\DoxyCodeLine{01206\ \ \ CLEAR\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaeedb99c6edfa679f95441003a4fa184d}{DMAMUX\_CxCR\_SE}});}
\DoxyCodeLine{01207\ \}}
\DoxyCodeLine{01208\ }
\DoxyCodeLine{01232\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsEnabledSync(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{01233\ \{}
\DoxyCodeLine{01234\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01235\ }
\DoxyCodeLine{01236\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaeedb99c6edfa679f95441003a4fa184d}{DMAMUX\_CxCR\_SE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaeedb99c6edfa679f95441003a4fa184d}{DMAMUX\_CxCR\_SE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01237\ \}}
\DoxyCodeLine{01238\ }
\DoxyCodeLine{01287\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_SetSyncID(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel,\ uint32\_t\ SyncID)}
\DoxyCodeLine{01288\ \{}
\DoxyCodeLine{01289\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01290\ }
\DoxyCodeLine{01291\ \ \ MODIFY\_REG(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga03842cdf2e83bfd10cb18ccb9950294c}{DMAMUX\_CxCR\_SYNC\_ID}},\ SyncID);}
\DoxyCodeLine{01292\ \}}
\DoxyCodeLine{01293\ }
\DoxyCodeLine{01341\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_GetSyncID(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{01342\ \{}
\DoxyCodeLine{01343\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01344\ }
\DoxyCodeLine{01345\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga03842cdf2e83bfd10cb18ccb9950294c}{DMAMUX\_CxCR\_SYNC\_ID}}));}
\DoxyCodeLine{01346\ \}}
\DoxyCodeLine{01347\ }
\DoxyCodeLine{01363\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_EnableRequestGen(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel)}
\DoxyCodeLine{01364\ \{}
\DoxyCodeLine{01365\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01366\ }
\DoxyCodeLine{01367\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ (RequestGenChannel))))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5ff9c72476bf78b81d0adc19400d23c6}{DMAMUX\_RGxCR\_GE}});}
\DoxyCodeLine{01368\ \}}
\DoxyCodeLine{01369\ }
\DoxyCodeLine{01381\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_DisableRequestGen(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel)}
\DoxyCodeLine{01382\ \{}
\DoxyCodeLine{01383\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01384\ }
\DoxyCodeLine{01385\ \ \ CLEAR\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ (RequestGenChannel))))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5ff9c72476bf78b81d0adc19400d23c6}{DMAMUX\_RGxCR\_GE}});}
\DoxyCodeLine{01386\ \}}
\DoxyCodeLine{01387\ }
\DoxyCodeLine{01403\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsEnabledRequestGen(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel)}
\DoxyCodeLine{01404\ \{}
\DoxyCodeLine{01405\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01406\ }
\DoxyCodeLine{01407\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ RequestGenChannel)))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5ff9c72476bf78b81d0adc19400d23c6}{DMAMUX\_RGxCR\_GE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5ff9c72476bf78b81d0adc19400d23c6}{DMAMUX\_RGxCR\_GE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01408\ \}}
\DoxyCodeLine{01409\ }
\DoxyCodeLine{01430\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_SetRequestGenPolarity(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel,\ uint32\_t\ Polarity)}
\DoxyCodeLine{01431\ \{}
\DoxyCodeLine{01432\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01433\ }
\DoxyCodeLine{01434\ \ \ MODIFY\_REG(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ RequestGenChannel)))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad386b0f74797327dd7af2fa02fe9244e}{DMAMUX\_RGxCR\_GPOL}},\ Polarity);}
\DoxyCodeLine{01435\ \}}
\DoxyCodeLine{01436\ }
\DoxyCodeLine{01456\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_GetRequestGenPolarity(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel)}
\DoxyCodeLine{01457\ \{}
\DoxyCodeLine{01458\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01459\ }
\DoxyCodeLine{01460\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ RequestGenChannel)))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad386b0f74797327dd7af2fa02fe9244e}{DMAMUX\_RGxCR\_GPOL}}));}
\DoxyCodeLine{01461\ \}}
\DoxyCodeLine{01462\ }
\DoxyCodeLine{01480\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_SetGenRequestNb(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel,\ uint32\_t\ RequestNb)}
\DoxyCodeLine{01481\ \{}
\DoxyCodeLine{01482\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01483\ }
\DoxyCodeLine{01484\ \ \ MODIFY\_REG(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ RequestGenChannel)))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae2d8df4b352776aac7f8f87d7df10d2b}{DMAMUX\_RGxCR\_GNBREQ}},\ (RequestNb\ -\/\ 1U)\ <<\ DMAMUX\_RGxCR\_GNBREQ\_Pos);}
\DoxyCodeLine{01485\ \}}
\DoxyCodeLine{01486\ }
\DoxyCodeLine{01502\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_GetGenRequestNb(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel)}
\DoxyCodeLine{01503\ \{}
\DoxyCodeLine{01504\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01505\ }
\DoxyCodeLine{01506\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ RequestGenChannel)))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae2d8df4b352776aac7f8f87d7df10d2b}{DMAMUX\_RGxCR\_GNBREQ}})\ >>\ DMAMUX\_RGxCR\_GNBREQ\_Pos)\ +\ 1U);}
\DoxyCodeLine{01507\ \}}
\DoxyCodeLine{01508\ }
\DoxyCodeLine{01564\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_SetRequestSignalID(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel,\ uint32\_t\ RequestSignalID)}
\DoxyCodeLine{01565\ \{}
\DoxyCodeLine{01566\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01567\ }
\DoxyCodeLine{01568\ \ \ MODIFY\_REG(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ RequestGenChannel)))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae252cb4694b6419a79b635fefc75cec7}{DMAMUX\_RGxCR\_SIG\_ID}},\ RequestSignalID);}
\DoxyCodeLine{01569\ \}}
\DoxyCodeLine{01570\ }
\DoxyCodeLine{01610\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_GetRequestSignalID(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel)}
\DoxyCodeLine{01611\ \{}
\DoxyCodeLine{01612\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01613\ }
\DoxyCodeLine{01614\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ RequestGenChannel)))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae252cb4694b6419a79b635fefc75cec7}{DMAMUX\_RGxCR\_SIG\_ID}}));}
\DoxyCodeLine{01615\ \}}
\DoxyCodeLine{01616\ }
\DoxyCodeLine{01620\ }
\DoxyCodeLine{01624\ }
\DoxyCodeLine{01631\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO0(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01632\ \{}
\DoxyCodeLine{01633\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01634\ }
\DoxyCodeLine{01635\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0670ce82c5515dbd0fa7ffb30c5e310f}{DMAMUX\_CSR\_SOF0}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0670ce82c5515dbd0fa7ffb30c5e310f}{DMAMUX\_CSR\_SOF0}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01636\ \}}
\DoxyCodeLine{01637\ }
\DoxyCodeLine{01644\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO1(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01645\ \{}
\DoxyCodeLine{01646\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01647\ }
\DoxyCodeLine{01648\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga07f62e6a76515c51c49b69c065493474}{DMAMUX\_CSR\_SOF1}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga07f62e6a76515c51c49b69c065493474}{DMAMUX\_CSR\_SOF1}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01649\ \}}
\DoxyCodeLine{01650\ }
\DoxyCodeLine{01657\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO2(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01658\ \{}
\DoxyCodeLine{01659\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01660\ }
\DoxyCodeLine{01661\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga897d89e7184b94eb0afbca21cb8750db}{DMAMUX\_CSR\_SOF2}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga897d89e7184b94eb0afbca21cb8750db}{DMAMUX\_CSR\_SOF2}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01662\ \}}
\DoxyCodeLine{01663\ }
\DoxyCodeLine{01670\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO3(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01671\ \{}
\DoxyCodeLine{01672\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01673\ }
\DoxyCodeLine{01674\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7b0ed04270f1d02833c7dc9a7b0c312f}{DMAMUX\_CSR\_SOF3}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7b0ed04270f1d02833c7dc9a7b0c312f}{DMAMUX\_CSR\_SOF3}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01675\ \}}
\DoxyCodeLine{01676\ }
\DoxyCodeLine{01683\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO4(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01684\ \{}
\DoxyCodeLine{01685\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01686\ }
\DoxyCodeLine{01687\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga66e851a768425793ea5420c35b4829b0}{DMAMUX\_CSR\_SOF4}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga66e851a768425793ea5420c35b4829b0}{DMAMUX\_CSR\_SOF4}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01688\ \}}
\DoxyCodeLine{01689\ }
\DoxyCodeLine{01696\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO5(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01697\ \{}
\DoxyCodeLine{01698\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01699\ }
\DoxyCodeLine{01700\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafeee06709196b4ba722e7ce237b27ef1}{DMAMUX\_CSR\_SOF5}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gafeee06709196b4ba722e7ce237b27ef1}{DMAMUX\_CSR\_SOF5}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01701\ \}}
\DoxyCodeLine{01702\ }
\DoxyCodeLine{01709\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO6(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01710\ \{}
\DoxyCodeLine{01711\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01712\ }
\DoxyCodeLine{01713\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf916a041d2e0a1d335dd88c59a3164f4}{DMAMUX\_CSR\_SOF6}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf916a041d2e0a1d335dd88c59a3164f4}{DMAMUX\_CSR\_SOF6}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01714\ \}}
\DoxyCodeLine{01715\ }
\DoxyCodeLine{01722\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO7(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01723\ \{}
\DoxyCodeLine{01724\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01725\ }
\DoxyCodeLine{01726\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0f52b9e34e9124f38f9311e484cee5af}{DMAMUX\_CSR\_SOF7}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0f52b9e34e9124f38f9311e484cee5af}{DMAMUX\_CSR\_SOF7}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01727\ \}}
\DoxyCodeLine{01728\ }
\DoxyCodeLine{01735\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO8(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01736\ \{}
\DoxyCodeLine{01737\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01738\ }
\DoxyCodeLine{01739\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd5cf65ac4cc733e2f2f28c42d6304ce}{DMAMUX\_CSR\_SOF8}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd5cf65ac4cc733e2f2f28c42d6304ce}{DMAMUX\_CSR\_SOF8}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01740\ \}}
\DoxyCodeLine{01741\ }
\DoxyCodeLine{01748\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO9(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01749\ \{}
\DoxyCodeLine{01750\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01751\ }
\DoxyCodeLine{01752\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6ac517220adb10b0cd416319fc78fb15}{DMAMUX\_CSR\_SOF9}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6ac517220adb10b0cd416319fc78fb15}{DMAMUX\_CSR\_SOF9}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01753\ \}}
\DoxyCodeLine{01754\ }
\DoxyCodeLine{01761\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO10(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01762\ \{}
\DoxyCodeLine{01763\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01764\ }
\DoxyCodeLine{01765\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0b857b97158e3f07fdf977cbb10a762c}{DMAMUX\_CSR\_SOF10}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0b857b97158e3f07fdf977cbb10a762c}{DMAMUX\_CSR\_SOF10}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01766\ \}}
\DoxyCodeLine{01767\ }
\DoxyCodeLine{01774\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO11(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01775\ \{}
\DoxyCodeLine{01776\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01777\ }
\DoxyCodeLine{01778\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gadd5405eaf145a04194b23e656bddd55c}{DMAMUX\_CSR\_SOF11}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gadd5405eaf145a04194b23e656bddd55c}{DMAMUX\_CSR\_SOF11}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01779\ \}}
\DoxyCodeLine{01780\ }
\DoxyCodeLine{01787\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO12(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01788\ \{}
\DoxyCodeLine{01789\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01790\ }
\DoxyCodeLine{01791\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga70c490a57226b0cf65670ef0862bc570}{DMAMUX\_CSR\_SOF12}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga70c490a57226b0cf65670ef0862bc570}{DMAMUX\_CSR\_SOF12}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01792\ \}}
\DoxyCodeLine{01793\ }
\DoxyCodeLine{01800\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO13(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01801\ \{}
\DoxyCodeLine{01802\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01803\ }
\DoxyCodeLine{01804\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa50538fa1251d21a8d8acb939467500b}{DMAMUX\_CSR\_SOF13}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa50538fa1251d21a8d8acb939467500b}{DMAMUX\_CSR\_SOF13}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01805\ \}}
\DoxyCodeLine{01806\ }
\DoxyCodeLine{01813\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO14(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01814\ \{}
\DoxyCodeLine{01815\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01816\ }
\DoxyCodeLine{01817\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2bdfde9a50025c2d3a34a45e2ad25570}{DMAMUX\_CSR\_SOF14}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2bdfde9a50025c2d3a34a45e2ad25570}{DMAMUX\_CSR\_SOF14}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01818\ \}}
\DoxyCodeLine{01819\ }
\DoxyCodeLine{01826\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_SO15(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01827\ \{}
\DoxyCodeLine{01828\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01829\ }
\DoxyCodeLine{01830\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6e1687baf7f27e09f57891f1c6adc2e2}{DMAMUX\_CSR\_SOF15}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6e1687baf7f27e09f57891f1c6adc2e2}{DMAMUX\_CSR\_SOF15}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01831\ \}}
\DoxyCodeLine{01832\ }
\DoxyCodeLine{01839\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_RGO0(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01840\ \{}
\DoxyCodeLine{01841\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01842\ }
\DoxyCodeLine{01843\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac7b3f4937e86d1fb056c2967506e1111}{DMAMUX\_RGSR\_OF0}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac7b3f4937e86d1fb056c2967506e1111}{DMAMUX\_RGSR\_OF0}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01844\ \}}
\DoxyCodeLine{01845\ }
\DoxyCodeLine{01852\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_RGO1(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01853\ \{}
\DoxyCodeLine{01854\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01855\ }
\DoxyCodeLine{01856\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab0542871f3fbe583003090bab8268818}{DMAMUX\_RGSR\_OF1}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gab0542871f3fbe583003090bab8268818}{DMAMUX\_RGSR\_OF1}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01857\ \}}
\DoxyCodeLine{01858\ }
\DoxyCodeLine{01865\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_RGO2(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01866\ \{}
\DoxyCodeLine{01867\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01868\ }
\DoxyCodeLine{01869\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab8edd203deac52aadb99a89719a574e6}{DMAMUX\_RGSR\_OF2}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gab8edd203deac52aadb99a89719a574e6}{DMAMUX\_RGSR\_OF2}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01870\ \}}
\DoxyCodeLine{01871\ }
\DoxyCodeLine{01878\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_RGO3(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01879\ \{}
\DoxyCodeLine{01880\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01881\ }
\DoxyCodeLine{01882\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1a380f3cd5a179e1a66f972bc45d712a}{DMAMUX\_RGSR\_OF3}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1a380f3cd5a179e1a66f972bc45d712a}{DMAMUX\_RGSR\_OF3}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01883\ \}}
\DoxyCodeLine{01884\ }
\DoxyCodeLine{01891\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_RGO4(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01892\ \{}
\DoxyCodeLine{01893\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01894\ }
\DoxyCodeLine{01895\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga173d2ffe30f6b3b336ff1cb386c51907}{DMAMUX\_RGSR\_OF4}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga173d2ffe30f6b3b336ff1cb386c51907}{DMAMUX\_RGSR\_OF4}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01896\ \}}
\DoxyCodeLine{01897\ }
\DoxyCodeLine{01904\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_RGO5(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01905\ \{}
\DoxyCodeLine{01906\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01907\ }
\DoxyCodeLine{01908\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga50d8f1ebf356c30e5a76c47eb5c05035}{DMAMUX\_RGSR\_OF5}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga50d8f1ebf356c30e5a76c47eb5c05035}{DMAMUX\_RGSR\_OF5}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01909\ \}}
\DoxyCodeLine{01910\ }
\DoxyCodeLine{01917\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_RGO6(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01918\ \{}
\DoxyCodeLine{01919\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01920\ }
\DoxyCodeLine{01921\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0d8a727ea195cfc3bb58443ec7e199ad}{DMAMUX\_RGSR\_OF6}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0d8a727ea195cfc3bb58443ec7e199ad}{DMAMUX\_RGSR\_OF6}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01922\ \}}
\DoxyCodeLine{01923\ }
\DoxyCodeLine{01930\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsActiveFlag\_RGO7(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01931\ \{}
\DoxyCodeLine{01932\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01933\ }
\DoxyCodeLine{01934\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGSR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacf9ac296560c925a02a7670f9956da74}{DMAMUX\_RGSR\_OF7}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gacf9ac296560c925a02a7670f9956da74}{DMAMUX\_RGSR\_OF7}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01935\ \}}
\DoxyCodeLine{01936\ }
\DoxyCodeLine{01943\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO0(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01944\ \{}
\DoxyCodeLine{01945\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01946\ }
\DoxyCodeLine{01947\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaeef7c29bdda17ad3b1bed01644b1ab33}{DMAMUX\_CFR\_CSOF0}});}
\DoxyCodeLine{01948\ \}}
\DoxyCodeLine{01949\ }
\DoxyCodeLine{01956\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO1(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01957\ \{}
\DoxyCodeLine{01958\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01959\ }
\DoxyCodeLine{01960\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaef484190cb68042bf4e9e8a50644f754}{DMAMUX\_CFR\_CSOF1}});}
\DoxyCodeLine{01961\ \}}
\DoxyCodeLine{01962\ }
\DoxyCodeLine{01969\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO2(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01970\ \{}
\DoxyCodeLine{01971\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01972\ }
\DoxyCodeLine{01973\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga83b3e64ad19bc75863f33f52a03fd75a}{DMAMUX\_CFR\_CSOF2}});}
\DoxyCodeLine{01974\ \}}
\DoxyCodeLine{01975\ }
\DoxyCodeLine{01982\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO3(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01983\ \{}
\DoxyCodeLine{01984\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01985\ }
\DoxyCodeLine{01986\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga68b9cdd5ab4cf0a2fb0887b5db4e0a58}{DMAMUX\_CFR\_CSOF3}});}
\DoxyCodeLine{01987\ \}}
\DoxyCodeLine{01988\ }
\DoxyCodeLine{01995\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO4(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{01996\ \{}
\DoxyCodeLine{01997\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{01998\ }
\DoxyCodeLine{01999\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga026bccb90d1300c53d8700e25942d144}{DMAMUX\_CFR\_CSOF4}});}
\DoxyCodeLine{02000\ \}}
\DoxyCodeLine{02001\ }
\DoxyCodeLine{02008\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO5(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02009\ \{}
\DoxyCodeLine{02010\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02011\ }
\DoxyCodeLine{02012\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae176fa2b8832da594c6a130d5892c779}{DMAMUX\_CFR\_CSOF5}});}
\DoxyCodeLine{02013\ \}}
\DoxyCodeLine{02014\ }
\DoxyCodeLine{02021\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO6(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02022\ \{}
\DoxyCodeLine{02023\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02024\ }
\DoxyCodeLine{02025\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga695c26af87b7d7d2d727742d6f726f99}{DMAMUX\_CFR\_CSOF6}});}
\DoxyCodeLine{02026\ \}}
\DoxyCodeLine{02027\ }
\DoxyCodeLine{02034\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO7(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02035\ \{}
\DoxyCodeLine{02036\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02037\ }
\DoxyCodeLine{02038\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8870fbbcb14d04590dac916982dc69ba}{DMAMUX\_CFR\_CSOF7}});}
\DoxyCodeLine{02039\ \}}
\DoxyCodeLine{02040\ }
\DoxyCodeLine{02047\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO8(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02048\ \{}
\DoxyCodeLine{02049\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02050\ }
\DoxyCodeLine{02051\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa645515a75688d7cc1cde84bfd7fcdf6}{DMAMUX\_CFR\_CSOF8}});}
\DoxyCodeLine{02052\ \}}
\DoxyCodeLine{02053\ }
\DoxyCodeLine{02060\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO9(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02061\ \{}
\DoxyCodeLine{02062\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02063\ }
\DoxyCodeLine{02064\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4902a905a36690cd3fd0fe4cfdaf7af8}{DMAMUX\_CFR\_CSOF9}});}
\DoxyCodeLine{02065\ \}}
\DoxyCodeLine{02066\ }
\DoxyCodeLine{02073\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO10(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02074\ \{}
\DoxyCodeLine{02075\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02076\ }
\DoxyCodeLine{02077\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5c5230346bdb333bdf91a14f98a1a199}{DMAMUX\_CFR\_CSOF10}});}
\DoxyCodeLine{02078\ \}}
\DoxyCodeLine{02079\ }
\DoxyCodeLine{02086\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO11(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02087\ \{}
\DoxyCodeLine{02088\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02089\ }
\DoxyCodeLine{02090\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga81458488d3ad3181de0d73fe76baa1bd}{DMAMUX\_CFR\_CSOF11}});}
\DoxyCodeLine{02091\ \}}
\DoxyCodeLine{02092\ }
\DoxyCodeLine{02099\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO12(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02100\ \{}
\DoxyCodeLine{02101\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02102\ }
\DoxyCodeLine{02103\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2611d87d605fdb5a10fb3293d6078fd1}{DMAMUX\_CFR\_CSOF12}});}
\DoxyCodeLine{02104\ \}}
\DoxyCodeLine{02105\ }
\DoxyCodeLine{02112\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO13(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02113\ \{}
\DoxyCodeLine{02114\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02115\ }
\DoxyCodeLine{02116\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga62ed900828509efd93205b1a78f0547d}{DMAMUX\_CFR\_CSOF13}});}
\DoxyCodeLine{02117\ \}}
\DoxyCodeLine{02118\ }
\DoxyCodeLine{02125\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO14(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02126\ \{}
\DoxyCodeLine{02127\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02128\ }
\DoxyCodeLine{02129\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gade31b2437ccc710859fcf3717c673734}{DMAMUX\_CFR\_CSOF14}});}
\DoxyCodeLine{02130\ \}}
\DoxyCodeLine{02131\ }
\DoxyCodeLine{02138\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_SO15(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02139\ \{}
\DoxyCodeLine{02140\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02141\ }
\DoxyCodeLine{02142\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel_status___type_def}{DMAMUX\_ChannelStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_CH\_STATUS\_OFFSET))-\/>CFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafc14611f6e8c73c493855e7076b85f7a}{DMAMUX\_CFR\_CSOF15}});}
\DoxyCodeLine{02143\ \}}
\DoxyCodeLine{02144\ }
\DoxyCodeLine{02151\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_RGO0(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02152\ \{}
\DoxyCodeLine{02153\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02154\ }
\DoxyCodeLine{02155\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGCFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae3d433cf4d3caaaf83e777a62555b15f}{DMAMUX\_RGCFR\_COF0}});}
\DoxyCodeLine{02156\ \}}
\DoxyCodeLine{02157\ }
\DoxyCodeLine{02164\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_RGO1(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02165\ \{}
\DoxyCodeLine{02166\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02167\ }
\DoxyCodeLine{02168\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGCFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga0848b4198324d163f3fe65c47c37493c}{DMAMUX\_RGCFR\_COF1}});}
\DoxyCodeLine{02169\ \}}
\DoxyCodeLine{02170\ }
\DoxyCodeLine{02177\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_RGO2(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02178\ \{}
\DoxyCodeLine{02179\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02180\ }
\DoxyCodeLine{02181\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGCFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga21bff5e11e62fb6e2fd401aa645acda0}{DMAMUX\_RGCFR\_COF2}});}
\DoxyCodeLine{02182\ \}}
\DoxyCodeLine{02183\ }
\DoxyCodeLine{02190\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_RGO3(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02191\ \{}
\DoxyCodeLine{02192\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02193\ }
\DoxyCodeLine{02194\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGCFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafc921ca625490acde916416c413ac115}{DMAMUX\_RGCFR\_COF3}});}
\DoxyCodeLine{02195\ \}}
\DoxyCodeLine{02196\ }
\DoxyCodeLine{02203\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_RGO4(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02204\ \{}
\DoxyCodeLine{02205\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02206\ }
\DoxyCodeLine{02207\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGCFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga04b339399842c086404fa450ea1b9281}{DMAMUX\_RGCFR\_COF4}});}
\DoxyCodeLine{02208\ \}}
\DoxyCodeLine{02209\ }
\DoxyCodeLine{02216\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_RGO5(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02217\ \{}
\DoxyCodeLine{02218\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02219\ }
\DoxyCodeLine{02220\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGCFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga60f5b2c0c2852ef9854dc372963f7e5f}{DMAMUX\_RGCFR\_COF5}});}
\DoxyCodeLine{02221\ \}}
\DoxyCodeLine{02222\ }
\DoxyCodeLine{02229\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_RGO6(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02230\ \{}
\DoxyCodeLine{02231\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02232\ }
\DoxyCodeLine{02233\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGCFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8f2cd9d097ca482485f2e658aae6232c}{DMAMUX\_RGCFR\_COF6}});}
\DoxyCodeLine{02234\ \}}
\DoxyCodeLine{02235\ }
\DoxyCodeLine{02242\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_ClearFlag\_RGO7(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx)}
\DoxyCodeLine{02243\ \{}
\DoxyCodeLine{02244\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02245\ }
\DoxyCodeLine{02246\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen_status___type_def}{DMAMUX\_RequestGenStatus\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_STATUS\_OFFSET))-\/>RGCFR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4d658a13bbc0629b9099a542608bcefb}{DMAMUX\_RGCFR\_COF7}});}
\DoxyCodeLine{02247\ \}}
\DoxyCodeLine{02248\ }
\DoxyCodeLine{02252\ }
\DoxyCodeLine{02256\ }
\DoxyCodeLine{02280\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_EnableIT\_SO(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{02281\ \{}
\DoxyCodeLine{02282\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02283\ }
\DoxyCodeLine{02284\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)((uint32\_t)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel)))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga15775843ac0ed584bf9a1cfffd8f38b8}{DMAMUX\_CxCR\_SOIE}});}
\DoxyCodeLine{02285\ \}}
\DoxyCodeLine{02286\ }
\DoxyCodeLine{02310\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_DisableIT\_SO(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{02311\ \{}
\DoxyCodeLine{02312\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02313\ }
\DoxyCodeLine{02314\ \ \ CLEAR\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)((uint32\_t)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel)))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga15775843ac0ed584bf9a1cfffd8f38b8}{DMAMUX\_CxCR\_SOIE}});}
\DoxyCodeLine{02315\ \}}
\DoxyCodeLine{02316\ }
\DoxyCodeLine{02340\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsEnabledIT\_SO(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ Channel)}
\DoxyCodeLine{02341\ \{}
\DoxyCodeLine{02342\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02343\ }
\DoxyCodeLine{02344\ \ \ \textcolor{keywordflow}{return}\ (READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ (DMAMUX\_CCR\_SIZE\ *\ (Channel))))-\/>CCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga15775843ac0ed584bf9a1cfffd8f38b8}{DMAMUX\_CxCR\_SOIE}}));}
\DoxyCodeLine{02345\ \}}
\DoxyCodeLine{02346\ }
\DoxyCodeLine{02362\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_EnableIT\_RGO(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel)}
\DoxyCodeLine{02363\ \{}
\DoxyCodeLine{02364\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02365\ }
\DoxyCodeLine{02366\ \ \ SET\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ RequestGenChannel)))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6fde828ebf2591bf66b85b962d55f7c1}{DMAMUX\_RGxCR\_OIE}});}
\DoxyCodeLine{02367\ \}}
\DoxyCodeLine{02368\ }
\DoxyCodeLine{02384\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_DMAMUX\_DisableIT\_RGO(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel)}
\DoxyCodeLine{02385\ \{}
\DoxyCodeLine{02386\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02387\ }
\DoxyCodeLine{02388\ \ \ CLEAR\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ RequestGenChannel)))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6fde828ebf2591bf66b85b962d55f7c1}{DMAMUX\_RGxCR\_OIE}});}
\DoxyCodeLine{02389\ \}}
\DoxyCodeLine{02390\ }
\DoxyCodeLine{02406\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_DMAMUX\_IsEnabledIT\_RGO(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_d_m_a_m_u_x___channel___type_def}{DMAMUX\_Channel\_TypeDef}}\ *DMAMUXx,\ uint32\_t\ RequestGenChannel)}
\DoxyCodeLine{02407\ \{}
\DoxyCodeLine{02408\ \ \ uint32\_t\ dmamux\_base\_addr\ =\ (uint32\_t)DMAMUXx;}
\DoxyCodeLine{02409\ }
\DoxyCodeLine{02410\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(((\mbox{\hyperlink{struct_d_m_a_m_u_x___request_gen___type_def}{DMAMUX\_RequestGen\_TypeDef}}\ *)(dmamux\_base\_addr\ +\ DMAMUX\_REQ\_GEN\_OFFSET\ +\ (DMAMUX\_RGCR\_SIZE\ *\ RequestGenChannel)))-\/>RGCR,\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6fde828ebf2591bf66b85b962d55f7c1}{DMAMUX\_RGxCR\_OIE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6fde828ebf2591bf66b85b962d55f7c1}{DMAMUX\_RGxCR\_OIE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02411\ \}}
\DoxyCodeLine{02412\ }
\DoxyCodeLine{02416\ }
\DoxyCodeLine{02420\ }
\DoxyCodeLine{02424\ }
\DoxyCodeLine{02425\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ DMAMUX1\ ||\ DMAMUX2\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02426\ }
\DoxyCodeLine{02430\ }
\DoxyCodeLine{02431\ \textcolor{preprocessor}{\#ifdef\ \_\_cplusplus}}
\DoxyCodeLine{02432\ \}}
\DoxyCodeLine{02433\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{02434\ }
\DoxyCodeLine{02435\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ \_\_STM32H7xx\_LL\_DMAMUX\_H\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{02436\ }

\end{DoxyCode}
